Hybrid core X86 based computer tips up at SC08

THE WORLD’S FIRST hybrid-core computer was unveiled yesterday at the Supercomputing Conference 2008 in Austin, Texas (SC08), by start-up firm Convey Computer Corporation.

The Convey HC-1, boasts a combination of patent-pending computer architecture and compiler technology with commercial, off-the-shelf hardware – namely an Intel Xeon processor and Xilinx Field Programmable Gate Arrays. This purportedly melds the low cost, simple programming model of a commodity system with the performance of customised hardware architecture.

There has been buzz and fascination around Field Programmable Gate Arrays (FPGAs) chip technology for yonks now, mainly due to them being easily reprogrammable and offering amazing computer hardware speed. For whatever reason, however, FPGAs have not really been harnessed properly until now.

In the HC-1, FPGAs are wrapped into a reconfigurable coprocessor, running next to a standard multicore x86 CPU. Both the CPU and coprocessor can be programmed with C/C++ and Fortran, meaning that one could literally take legacy code, pass it through the Convey compiler and get a stunningly fast-running executable out the other end. Running the Linux operating system in a 2U chassis and boasting bandwidths of 80 GB/s, the HC-1 also keeps it all together and in sequence with a nifty cache-coherency system.

This sets the HC-1 apart from environments like Nvidia’s CUDA for GPUs or ImpulseC (for FPGAs) which use extended forms of C, meaning legacy code has to be ported before it can be accelerated. Convey also reckons the HC-1 saves on human productivity compared to other environments which are tied to a particular architecture or are forced to rely on a configuration management system to keep separate source trees.

When it comes to usage, Convey believes its HC-1 could be used for a plethora of compute-intensive applications, including financial, seismic and biomedical. The system can adapt itself to its task thanks to the unique compiler design which integrates "personalities". This lets whichever application is targeted, render the FPGA in specific ways to boost throughput for that particular application model and workload.

What this also means is that a framework is created which simultaneously allows for full binary compatibility across the board, whilst letting some operations in a configuration use more of the custom core, thereby speeding up data processing. In other words, developers get to build their very own " procedural" personalities using the Convey supplied Personality Development Kit, turning the HC-1 into a veritable shape shifter. Might be a first that, developers with personalities.

Intel’s Pat Gelsinger, senior Veep and general manager of the firm’s Digital Enterprise Group noted, "Convey’s system is unique in that it does not require programmers to instrument their code but, instead, provides an open-standard programming model that does not use proprietary mechanisms that have historically limited adoption of heterogeneous solutions."

For developers this essentially means getting to work on what appears to be a single x86-based machine but which actually has the added benefit of add-on extensions like a customisable co-processor, making it more similar to older 8087/80287/80387 FPU co-processors which plugged into motherboards all those years back.

On the face of things though, that privilege doesn’t come cheap, with an HC-1 server selling for about $32,000. What Convey plans to, er, convey however, is that since ye old average HPC app can be accelerated 10 times on this platform, every HC-1 is basically the equivalent of 10 regular x86 boxes, which, when put that way, represents significant cost savings as well as savings for power and cooling.

The first version of HC-1 will still use Chipzilla’s front-side bus to talk to the coprocessor, but now that Nehalem has been unleashed, Convey will soon be switching to QuickPath Interconnect-based system.

Steve Wallach, the HC-1’s big daddy and Convey’s creator is no stranger to supercomputers having been co-founder and CTO of Convex Computer, developing vector supercomputers, back in the 1980s and 90s. Wallach had originally approached AMD with his plans for HC-1, but when the firm proved skeptical, he packed up his blueprints and took them down to his old friend Justin Rattner, supercomputer buff and CTO of Intel.

Of course, bringing out new architecture is always a bit of a risk, especially in uncertain economic times, but Convey has, up till now, proved it can pull together and operate on a pretty tight budget. The firm raised only $15.1 million to date.

The first order for a HC-1 has already come in from the University of California, San Diego (UCSD) for its GreenLight power and energy efficiency initiative. µ